Hello, everyone! I am an Electrical Engineering and Computer Sciences Ph.D. candidate at the University of California, Berkeley in the SLICE lab (formerly the ADEPT lab) under Professor Emeritus Krste Asanovic. As part of my dissertation work, I've worked at Google with Engineering Fellow/VP Parthasarathy Ranganathan and Engineering Director Jichuan Chang. My research focuses on hyperscale cloud data center architectures, accelerator scheduling, and agile hardware design methodology. I've co-led various widely used open-source projects including the Chipyard SoC framework (used in over 20 tape-outs and over 150 peer-reviewed publications from over 65 companies/universities), the FireSim FPGA-accelerated simulation platform (used in over 60 peer-reviewed publications from over 25 companies/universities), and the Berkeley Out-of-Order Machine (BOOM) (the first open-source synthesizable RISC-V out-of-order core). My work has been published in various venues such as ISCA, DAC, IEEE Micro, and ESSCIRC. I've also led over 10 workshops and tutorials with over 200 unique attendees at top conferences such as ISCA, MICRO, ASPLOS, and HPCA. Prior to UC Berkeley, I received my B.S. in Electrical and Computer Engineering from the University of Texas at Austin. Please refer to my curriculum vitae below for my most up-to-date information. It includes various hyperlinks to past projects, experiences, and accomplishments of mine.